5-bit 5-GS/s Noninterleaved Time-Based ADC in 65-nm CMOS for Radio-Astronomy Applications
This paper presents a 5-bit noninterleaved time-based analog-to-digital converter (ADC), which operates at a 5-GS/s rate. The ADC is designed for the use in radio-astronomy telescopes, for which time interleaving is not acceptable. The ADC employs a dynamic, differential voltage-to-time converter, a...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2016-12, Vol.24 (12), p.3513-3525 |
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Sprache: | eng |
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Zusammenfassung: | This paper presents a 5-bit noninterleaved time-based analog-to-digital converter (ADC), which operates at a 5-GS/s rate. The ADC is designed for the use in radio-astronomy telescopes, for which time interleaving is not acceptable. The ADC employs a dynamic, differential voltage-to-time converter, a folded-flash time-to-digital converter (TDC), and calibration circuitry. To generate reference delays, the calibration circuitry utilizes a delay-time reference network, which is designed to map the input voltage range into 16 equal time intervals that are used for the calibration of the TDC. The 65-nm CMOS ADC achieves the Signal-to-noise plus distortion ratio/spurious-free dynamic range of 27/32 dB at Nyquist, an effective number of bits (ENOB) of 4.7 bit at low frequencies and 4.1 bit at high frequencies with a power consumption of 21.5 mW at Nyquist. |
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ISSN: | 1063-8210 1557-9999 |
DOI: | 10.1109/TVLSI.2016.2558105 |