Loss Mechanisms and Optimum Design Methodology for Efficient mm-Waves Class-E PAs

In this paper, loss mechanisms of monolithic high frequency Class-E PAs are studied. The switching behavior is analyzed to understand the discrepancy between common design equations and optimal design values as frequency scales up. Analytical results are verified by spice simulations. In addition, a design recipe based on loss analysis and effective output duty cycle is proposed for mm-waves PAs to boost their power added efficiency (PAE). The design approach is adopted to compare different technology nodes including the 130 nm, 90 nm, and 65 nm bulk CMOS. Newer technologies show better PAE only at the mm-waves regime. Simulations show that the PAE is boosted from 31% to 40% when the proposed design methodology is applied at 60 GHz using the 65 nm node.