A +10 dBm BLE Transmitter With Sub-400 pW Leakage for Ultra-Low Duty Cycles

A 2.4 GHz transmitter in 65 nm CMOS is optimized for extremely low duty-cycle regimes. Negative gate biasing of the main PA transistor in sleep mode achieves a 30× reduction in sleep-mode power without incurring on-performance degradation. The PA achieves a peak output power of +10.9 dBm and a total...

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Veröffentlicht in:IEEE journal of solid-state circuits 2016-06, Vol.51 (6), p.1331-1346
Hauptverfasser: Paidimarri, Arun, Ickes, Nathan, Chandrakasan, Anantha P.
Format: Artikel
Sprache:eng
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Zusammenfassung:A 2.4 GHz transmitter in 65 nm CMOS is optimized for extremely low duty-cycle regimes. Negative gate biasing of the main PA transistor in sleep mode achieves a 30× reduction in sleep-mode power without incurring on-performance degradation. The PA achieves a peak output power of +10.9 dBm and a total TX efficiency of 43.7%. A phase-locked loop is integrated, with direct modulation capability for the 1 Mbps GFSK modulation of Bluetooth Low Energy (BLE). The transmitter also includes a digital baseband with BLE support. Low voltage operation down to 0.68 V results in savings of both active switching power and leakage. Extensive power gating of all the blocks results in a total leakage of 370 pW for an on/off power ratio of 7.4×10 7 .
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2016.2539345