Easily testable realization based on OR-AND-EXOR expansion with single rail inputs

It is known that AND-EXOR two-level networks obtained by AND-EXOR expansion with positive literals are easily testable. They are based on the single-rail-input logic, and require (n+4) tests to detect their single stuck-at faults, where n is the number of the input variables. We present three-level...

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Hauptverfasser: Hirayama, T., Koda, G., Nishitani, Y., Shimizu, K.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:It is known that AND-EXOR two-level networks obtained by AND-EXOR expansion with positive literals are easily testable. They are based on the single-rail-input logic, and require (n+4) tests to detect their single stuck-at faults, where n is the number of the input variables. We present three-level networks obtained from the single-rail-input OR-AND-EXOR expansion and propose a more easily testable realization than the AND-EXOR networks. The realization is an OR-AND-EXOR network which limits the fan-in of the AND and OR gates to n/r and r respectively, where r is a constant (1/spl les/r/spl les/n). We show that only (r+n/r) tests are required to detect all the single stuck-at faults by adding r extra variables to the network.
DOI:10.1109/APCCAS.1998.743779