W-CDMA hardware-related issues

Overviews W-CDMA hardware-related issues and shows requirements for key devices of the W-CDMA and a solution for DSP, We propose a DSP architecture suited for W-CDMA. The main features of this architecture are: 1) highly efficient Viterbi error correction operation, 2) ability to perform a multiply-...

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Hauptverfasser: Ishikawa, T., Suzuki, H., Minamida, N., Yamanaka, R., Okamoto, M., Kabuo, H., Taki, H.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:Overviews W-CDMA hardware-related issues and shows requirements for key devices of the W-CDMA and a solution for DSP, We propose a DSP architecture suited for W-CDMA. The main features of this architecture are: 1) highly efficient Viterbi error correction operation, 2) ability to perform a multiply-accumulate operation and store the result to data memory in a single cycle when used in conjunction with a repeat instruction, 3) support for the double precision (40 bit) operations and data, 4) ability to perform a DMA to/from a fixed portion of internal memory without interrupting the processor. These features allow implementation of a W-CDMA voice channel less than 100 MIPS.
DOI:10.1109/ICCT.1998.743334