An effective cell scheduler guaranteeing fairness for input-queued ATM switch

High-speed input queued switches are known to be more economical and simpler than output queued switches. However, they suffer from HOL blocking which degrades throughput significantly. Input queued switches can achieve higher throughput if they use random access input queues and cell scheduling alg...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Mihye Lee, Sungjin Moon, Heasook Park, Kwangsuk Song, Boseob Kwon, Daeyoung Kim
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Asynchronous transfer mode Communication switching Optimal scheduling Processor scheduling Round robin Scheduling algorithm Switches Telecommunication switching Throughput Traffic control
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