An effective cell scheduler guaranteeing fairness for input-queued ATM switch

High-speed input queued switches are known to be more economical and simpler than output queued switches. However, they suffer from HOL blocking which degrades throughput significantly. Input queued switches can achieve higher throughput if they use random access input queues and cell scheduling algorithms. Especially, input queued ATM switches employing the cell-scheduling algorithm can increase the throughput by preventing output conflict. A self-firing cell scheduling algorithm in input queued ATM switches has been proposed but it is unfair in the sense that the throughputs from various input ports differ by significant amounts. In this paper, we propose a cell scheduler that has inherent fairness properties under any traffic pattern and prove that the proposed cell scheduler guarantees fairness even if traffic is not uniform pattern by computer simulation.