Solution-Based CdS on HfO2 Thin Films for High-Gain and Low-Voltage Unipolar Inverters
We demonstrate low-temperature processed and high-gain unipolar inverters operating at voltages as low as V D = 1 V. A maximum gain for a two-transistor unipolar inverter of 153 was achieved at V D = 5 V with the advantage of using a solution-based n-type semiconductor and an entire fabrication proc...
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| Veröffentlicht in: | IEEE transactions on electron devices 2016-04, Vol.63 (4), p.1437-1443 |
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| container_issue | 4 |
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| container_title | IEEE transactions on electron devices |
| container_volume | 63 |
| creator | Mejia, Israel Gutierrez-Heredia, Gerardo Salas-Villasenor, Ana L. Alvarado-Beltran, Clemente G. Avila-Avendano, Carlos Quevedo-Lopez, Manuel A. |
| description | We demonstrate low-temperature processed and high-gain unipolar inverters operating at voltages as low as V D = 1 V. A maximum gain for a two-transistor unipolar inverter of 153 was achieved at V D = 5 V with the advantage of using a solution-based n-type semiconductor and an entire fabrication process below 150 °C. We evaluate the impact of the gate dielectric thickness on the main thin-film transistor (TFT) parameters and operation voltage. In addition, we compare the conventional MOSFET square-law model indistinctly used in TFTs with a model specifically developed for TFTs. We demonstrate a methodology to model the TFT electrical characteristics and use the extracted parameters in SPICE simulations to evaluate different inverter configurations. Finally, we validate the SPICE simulations with our experiential results. |
| doi_str_mv | 10.1109/TED.2016.2532803 |
| format | Article |
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A maximum gain for a two-transistor unipolar inverter of 153 was achieved at V D = 5 V with the advantage of using a solution-based n-type semiconductor and an entire fabrication process below 150 °C. We evaluate the impact of the gate dielectric thickness on the main thin-film transistor (TFT) parameters and operation voltage. In addition, we compare the conventional MOSFET square-law model indistinctly used in TFTs with a model specifically developed for TFTs. We demonstrate a methodology to model the TFT electrical characteristics and use the extracted parameters in SPICE simulations to evaluate different inverter configurations. Finally, we validate the SPICE simulations with our experiential results.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2016.2532803</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Cadmium sulfide (CdS) ; Dielectric measurement ; Dielectrics ; Hafnium compounds ; high gain ; Inverters ; Logic gates ; low voltage ; SPICE ; Thin film transistors ; thin-film transistor (TFT) ; unipolar inverter</subject><ispartof>IEEE transactions on electron devices, 2016-04, Vol.63 (4), p.1437-1443</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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A maximum gain for a two-transistor unipolar inverter of 153 was achieved at V D = 5 V with the advantage of using a solution-based n-type semiconductor and an entire fabrication process below 150 °C. We evaluate the impact of the gate dielectric thickness on the main thin-film transistor (TFT) parameters and operation voltage. In addition, we compare the conventional MOSFET square-law model indistinctly used in TFTs with a model specifically developed for TFTs. We demonstrate a methodology to model the TFT electrical characteristics and use the extracted parameters in SPICE simulations to evaluate different inverter configurations. Finally, we validate the SPICE simulations with our experiential results.</description><subject>Cadmium sulfide (CdS)</subject><subject>Dielectric measurement</subject><subject>Dielectrics</subject><subject>Hafnium compounds</subject><subject>high gain</subject><subject>Inverters</subject><subject>Logic gates</subject><subject>low voltage</subject><subject>SPICE</subject><subject>Thin film transistors</subject><subject>thin-film transistor (TFT)</subject><subject>unipolar inverter</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNotjUtLAzEUhYMoWKt7wU3Adeq9SWaSLLX2BYUu-tgOaSdpU6aTmpkq_nsH6upwPj7OIeQZYYAI5m01-hxwwHzAM8E1iBvSwyxTzOQyvyU9ANTMCC3uyUPTHLuaS8l7ZLOM1aUNsWYftnElHZZLGms69QtOV4dQ03GoTg31MdFp2B_YxHbM1iWdxx-2iVVr946u63COlU10Vn-71LrUPJI7b6vGPf1nn6zHo9VwyuaLyWz4PmeBg2iZUlsBufbOoPWgpJAl19udEsZoDltACWBkCVpmxnfEWO906be7HMFlXIo-eb3unlP8urimLY7xkuruskClFSBHxM56uVrBOVecUzjZ9FsoyTPMM_EHNeJZTQ</recordid><startdate>201604</startdate><enddate>201604</enddate><creator>Mejia, Israel</creator><creator>Gutierrez-Heredia, Gerardo</creator><creator>Salas-Villasenor, Ana L.</creator><creator>Alvarado-Beltran, Clemente G.</creator><creator>Avila-Avendano, Carlos</creator><creator>Quevedo-Lopez, Manuel A.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>201604</creationdate><title>Solution-Based CdS on HfO2 Thin Films for High-Gain and Low-Voltage Unipolar Inverters</title><author>Mejia, Israel ; Gutierrez-Heredia, Gerardo ; Salas-Villasenor, Ana L. ; Alvarado-Beltran, Clemente G. ; Avila-Avendano, Carlos ; Quevedo-Lopez, Manuel A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i203t-77b3068fe91af07434d28bc7399820b0140094d08459f8209afe8dfbc610e5243</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Cadmium sulfide (CdS)</topic><topic>Dielectric measurement</topic><topic>Dielectrics</topic><topic>Hafnium compounds</topic><topic>high gain</topic><topic>Inverters</topic><topic>Logic gates</topic><topic>low voltage</topic><topic>SPICE</topic><topic>Thin film transistors</topic><topic>thin-film transistor (TFT)</topic><topic>unipolar inverter</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Mejia, Israel</creatorcontrib><creatorcontrib>Gutierrez-Heredia, Gerardo</creatorcontrib><creatorcontrib>Salas-Villasenor, Ana L.</creatorcontrib><creatorcontrib>Alvarado-Beltran, Clemente G.</creatorcontrib><creatorcontrib>Avila-Avendano, Carlos</creatorcontrib><creatorcontrib>Quevedo-Lopez, Manuel A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mejia, Israel</au><au>Gutierrez-Heredia, Gerardo</au><au>Salas-Villasenor, Ana L.</au><au>Alvarado-Beltran, Clemente G.</au><au>Avila-Avendano, Carlos</au><au>Quevedo-Lopez, Manuel A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Solution-Based CdS on HfO2 Thin Films for High-Gain and Low-Voltage Unipolar Inverters</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2016-04</date><risdate>2016</risdate><volume>63</volume><issue>4</issue><spage>1437</spage><epage>1443</epage><pages>1437-1443</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>We demonstrate low-temperature processed and high-gain unipolar inverters operating at voltages as low as V D = 1 V. A maximum gain for a two-transistor unipolar inverter of 153 was achieved at V D = 5 V with the advantage of using a solution-based n-type semiconductor and an entire fabrication process below 150 °C. We evaluate the impact of the gate dielectric thickness on the main thin-film transistor (TFT) parameters and operation voltage. In addition, we compare the conventional MOSFET square-law model indistinctly used in TFTs with a model specifically developed for TFTs. We demonstrate a methodology to model the TFT electrical characteristics and use the extracted parameters in SPICE simulations to evaluate different inverter configurations. Finally, we validate the SPICE simulations with our experiential results.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2016.2532803</doi><tpages>7</tpages><oa>free_for_read</oa></addata></record> |
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| ispartof | IEEE transactions on electron devices, 2016-04, Vol.63 (4), p.1437-1443 |
| issn | 0018-9383 1557-9646 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Cadmium sulfide (CdS) Dielectric measurement Dielectrics Hafnium compounds high gain Inverters Logic gates low voltage SPICE Thin film transistors thin-film transistor (TFT) unipolar inverter |
| title | Solution-Based CdS on HfO2 Thin Films for High-Gain and Low-Voltage Unipolar Inverters |
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