A 115-mW, 0.5-/spl mu/m CMOS GPS receiver with wide dynamic-range active filters

This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5-/spl mu/m CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition,...

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Veröffentlicht in:IEEE journal of solid-state circuits 1998-12, Vol.33 (12), p.2219-2231
Hauptverfasser: Shaeffer, D.K., Shahani, A.R., Mohan, S.S., Samavati, H., Rategh, H.R., del Mar Hershenson, M., Min Xu, Yue, C.P., Eddleman, D.J., Lee, T.H.
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Sprache:eng
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Zusammenfassung:This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5-/spl mu/m CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of -130 dBm at the radio-frequency input.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.735706