A 256/spl times/256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output
A stepped reset-gate voltage technique is applied to a CMOS active pixel sensor array to increase dynamic range by 26 dB. A frame rate of 390 frames/s is achieved using column-parallel output circuits. Switched-capacitor correlated double-sampling circuits reduce fixed-pattern noise to 4.0 mV (dark)...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1998-12, Vol.33 (12), p.2081-2091 |
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Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A stepped reset-gate voltage technique is applied to a CMOS active pixel sensor array to increase dynamic range by 26 dB. A frame rate of 390 frames/s is achieved using column-parallel output circuits. Switched-capacitor correlated double-sampling circuits reduce fixed-pattern noise to 4.0 mV (dark). Cyclic analog-to-digital converters achieve approximately 9-b accuracy. At 30 frames/s, random noise is 0.56 mV (dark), optical dynamic range is 96 dB, and power is 52 mW. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.735551 |