Signal propagation on seamless high off-chip connectivity (SHOCC) interconnects

Signal propagation on seamless high off-chip connectivity (SHOCC) interconnects

Placing long on-chip signal lines in an interconnect substrate is regarded as a solution for the long lossy line (L/sup 3/) problem (Davidson et al, 1998). Modeling and simulation of SHOCC signal interconnects are described here. Simulations were carried out using a low impedance ideal driver and ca...

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Bibliographische Detailangaben
Hauptverfasser: Afonso, S., Brown, W.D., Schaper, L.W., Parkerson, J.P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Conductors
Dielectric substrates
Driver circuits
Frequency
Impedance
Integrated circuit interconnections
Power system interconnection
Power system protection
Topology
Wiring
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Zusammenfassung:Placing long on-chip signal lines in an interconnect substrate is regarded as a solution for the long lossy line (L/sup 3/) problem (Davidson et al, 1998). Modeling and simulation of SHOCC signal interconnects are described here. Simulations were carried out using a low impedance ideal driver and cascaded CMOS drivers to drive SHOCC interconnects and also typical on-chip interconnects so that a comparative study of their electrical performance could be made.
DOI:10.1109/EPEP.1998.733518