Characterization of a Serializer ASIC Chip for the Upgrade of the ATLAS Muon Detector

We report on the design of a serializer ASIC to be used in the ATLAS forward muon detector for trigger data transmission. We discuss the performance of a prototype chip covering power dissipation, latency and stable operating line rate. Tests show that the serializer is capable of running at least a...

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Veröffentlicht in:IEEE transactions on nuclear science 2015-12, Vol.62 (6), p.3242-3248
Hauptverfasser: Jinhong Wang, Liang Guan, Ziru Sang, Chapman, J. W., Tiesheng Dai, Bing Zhou, Junjie Zhu
Format: Artikel
Sprache:eng
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Zusammenfassung:We report on the design of a serializer ASIC to be used in the ATLAS forward muon detector for trigger data transmission. We discuss the performance of a prototype chip covering power dissipation, latency and stable operating line rate. Tests show that the serializer is capable of running at least at 5.76 Gbps with a bit error ratio below 1 ×10 - 15 , and a power consumption of 200 mW running at 4.8 Gbps. The latency between the start of loading 30 bits into the serializer to the transmission of the first bit from the serializer is measured to be about 6 ns.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2015.2480855