A Task-level Pipelined Many-SIMD Augmented Reality Processor with Congestion-aware Network-on-Chip Scheduler
For all day long operable markerless augmented reality system, low-power BONE-AR processor is implemented to execute object recognition, camera pose estimation, and 3D graphics rendering in real-time for a HD resolution video input. BONE-AR adopts 6 clusters of heterogeneous SIMD processors distribu...
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| Veröffentlicht in: | IEEE MICRO 2015-01, p.1-1 |
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| creator | Kim, Gyeonghoon Kim, Donghyun Park, Seongwook Kim, Youchang Lee, Kyuho Hong, Injoon Bong, Kyeongryeol Yoo, Hoi-Jun |
| description | For all day long operable markerless augmented reality system, low-power BONE-AR processor is implemented to execute object recognition, camera pose estimation, and 3D graphics rendering in real-time for a HD resolution video input. BONE-AR adopts 6 clusters of heterogeneous SIMD processors distributed on the mesh topology network-on-chip (NoC) to exploit data-level parallelism and task-level parallelism. Visual attention algorithm reduces overall workload by removing background clutters from the input video frames, but also incurs NoC congestion due to dynamically fluctuating workload. We propose a congestion-aware scheduler (CAS) that detects and resolves the NoC congestion to prevent throughput degradation of task-level pipeline. |
| doi_str_mv | 10.1109/MM.2015.2 |
| format | Article |
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| source | IEEE Electronic Library (IEL) |
| subjects | Cameras Estimation Feature extraction Mobile communication Object recognition Pipelines Streaming media |
| title | A Task-level Pipelined Many-SIMD Augmented Reality Processor with Congestion-aware Network-on-Chip Scheduler |
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