A Task-level Pipelined Many-SIMD Augmented Reality Processor with Congestion-aware Network-on-Chip Scheduler

For all day long operable markerless augmented reality system, low-power BONE-AR processor is implemented to execute object recognition, camera pose estimation, and 3D graphics rendering in real-time for a HD resolution video input. BONE-AR adopts 6 clusters of heterogeneous SIMD processors distribu...

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Veröffentlicht in:IEEE MICRO 2015-01, p.1-1
Hauptverfasser: Kim, Gyeonghoon, Kim, Donghyun, Park, Seongwook, Kim, Youchang, Lee, Kyuho, Hong, Injoon, Bong, Kyeongryeol, Yoo, Hoi-Jun
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Sprache:eng
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Zusammenfassung:For all day long operable markerless augmented reality system, low-power BONE-AR processor is implemented to execute object recognition, camera pose estimation, and 3D graphics rendering in real-time for a HD resolution video input. BONE-AR adopts 6 clusters of heterogeneous SIMD processors distributed on the mesh topology network-on-chip (NoC) to exploit data-level parallelism and task-level parallelism. Visual attention algorithm reduces overall workload by removing background clutters from the input video frames, but also incurs NoC congestion due to dynamically fluctuating workload. We propose a congestion-aware scheduler (CAS) that detects and resolves the NoC congestion to prevent throughput degradation of task-level pipeline.
ISSN:0272-1732
1937-4143
DOI:10.1109/MM.2015.2