Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator
In this paper, architecture of a Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) is given and the implementation results are discussed. The proposed architecture has a fully pipelined structure, capable of processing full-HD 1080p@60 (1920 × 1080 resolution at 60 Hz frame rate, 124.4 M...
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Veröffentlicht in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2015-01, Vol.62 (1), p.130-138 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | In this paper, architecture of a Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) is given and the implementation results are discussed. The proposed architecture has a fully pipelined structure, capable of processing full-HD 1080p@60 (1920 × 1080 resolution at 60 Hz frame rate, 124.4 MHz visible pixel rate) video streams, which is implemented on both high-end and low-cost FPGA devices, Altera Stratix IV GX 230, and Cyclone III C 25, respectively. Many features of the architecture are designed to be either pre-synthesis configurable or runtime programmable, which makes the processor extremely flexible, reusable, scalable, and practical. |
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ISSN: | 1549-8328 1558-0806 |
DOI: | 10.1109/TCSI.2014.2345502 |