PTC-Based Sigma-Delta ADCs for High-Speed, Low-Noise Imagers

This letter presents a novel column-parallel readout circuit for image sensors based on incremental-sigma-delta (ISD) ADCs. The excessive number of clock cycles needed per conversion is addressed. We apply the photon transfer curve-based conversion to a second-order ISD ADC, achieving a \(2.75\times...

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Veröffentlicht in:	IEEE sensors journal 2014-09, Vol.14 (9), p.2932-2933
Hauptverfasser:	Xhakoni, Adi, Ha Le-Thai, Geurts, Tomas, Chapinal, Genis, Gielen, Georges
Format:	Artikel
Sprache:	eng
Schlagworte:	Clocks Modulation Noise Photonics Quantization (signal) Sensors Sigma-delta modulation
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creator	Xhakoni, Adi Ha Le-Thai Geurts, Tomas Chapinal, Genis Gielen, Georges
description	This letter presents a novel column-parallel readout circuit for image sensors based on incremental-sigma-delta (ISD) ADCs. The excessive number of clock cycles needed per conversion is addressed. We apply the photon transfer curve-based conversion to a second-order ISD ADC, achieving a $2.75\times $ clock cycles reduction when compared with a standard second-order ISD ADC while maintaining a similar noise performance. This results in the reduction of the pixel readout time and of the size of the digital filter.
doi_str_mv	10.1109/JSEN.2014.2332635
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title	PTC-Based Sigma-Delta ADCs for High-Speed, Low-Noise Imagers
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