Chip scale packaging for memory devices

Chip scale packaging for memory devices

A low cost, high reliability chip scale package has been developed for memory devices. The developed CSP can be applied to center pad type devices such as DRAM and to peripheral pad type devices such as SRAM and Flash. Reliability and high volume productivity are the main technological challenges th...

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Bibliographische Detailangaben
Hauptverfasser: Akiyama, Y., Nishimura, A., Anjoh, I.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Chip scale packaging
Consumer electronics
Costs
Electronics packaging
Integrated circuit packaging
Lab-on-a-chip
Lead
Random access memory
Soldering
Thermal stresses
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Beschreibung
Zusammenfassung:A low cost, high reliability chip scale package has been developed for memory devices. The developed CSP can be applied to center pad type devices such as DRAM and to peripheral pad type devices such as SRAM and Flash. Reliability and high volume productivity are the main technological challenges that have to be overcome for chip scale packaging. This paper unveils Hitachi's original CSP concept and shows how our CSP overcomes these challenges.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.1998.678737