19.2 A 93.4mm2 64Gb MLC NAND-flash memory with 16nm CMOS technology
This paper presents a 64Gb MLC NAND-Flash memory fabricated with 16nm CMOS process technology to achieve high density and as small as 93.4mm2 die area. The chip consists of two planes of 1072 blocks each. A block consists of a string with 128 cells and a page size with 16KB and spare area for error-...
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| creator | Sungdae Choi Duckju Kim Sungwook Choi Byungryul Kim Sunghyun Jung Kichang Chun Namkyeong Kim Wanseob Lee Taisik Shin Hyunjong Jin Hyunchul Cho Sunghoon Ahn Yonghwan Hong Ingon Yang Byoungyoung Kim Pilseon Yoo Youngdon Jung Jinwoo Lee Jaehyeon Shin Taeyun Kim Kunwoo Park Jinwoong Kim |
| description | This paper presents a 64Gb MLC NAND-Flash memory fabricated with 16nm CMOS process technology to achieve high density and as small as 93.4mm2 die area. The chip consists of two planes of 1072 blocks each. A block consists of a string with 128 cells and a page size with 16KB and spare area for error-correction coding (ECC), totaling 4MB of capacity. The chip supports negative-level wordline drivability to increase cell Vth margin. |
| doi_str_mv | 10.1109/ISSCC.2014.6757455 |
| format | Conference Proceeding |
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The chip consists of two planes of 1072 blocks each. A block consists of a string with 128 cells and a page size with 16KB and spare area for error-correction coding (ECC), totaling 4MB of capacity. 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The chip supports negative-level wordline drivability to increase cell Vth margin.</description><subject>Computer architecture</subject><subject>Couplings</subject><subject>Flash memories</subject><subject>Integrated circuit interconnections</subject><subject>Microprocessors</subject><subject>Noise</subject><subject>Sensors</subject><issn>0193-6530</issn><issn>2376-8606</issn><isbn>1479909181</isbn><isbn>9781479909186</isbn><isbn>9781479909209</isbn><isbn>1479909203</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2014</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNp9zrtOwzAUgOHDTSKFvgAs5wVizrFjO2eszK1SW4awVwG5JChuUFIJ5e1ZMjP9w7f8AHdMipnkYV1VIShNXCjnrS-sPYOl-JILL0KiSc4h08a7vHTkLmAxA5d8CRmxmNxZQ9ewGMdvIrLiygwCi9K4QjGqSEmjK14-cLsJuFvtHvNDV48Nppj6YcLf9tQgu2PCsH2r8BQ_m2Pf9V_TLVwd6m6My7k3cP_89B5e8zbGuP8Z2lQP036eNv_rH73iO5Y</recordid><startdate>201402</startdate><enddate>201402</enddate><creator>Sungdae Choi</creator><creator>Duckju Kim</creator><creator>Sungwook Choi</creator><creator>Byungryul Kim</creator><creator>Sunghyun Jung</creator><creator>Kichang Chun</creator><creator>Namkyeong Kim</creator><creator>Wanseob Lee</creator><creator>Taisik Shin</creator><creator>Hyunjong Jin</creator><creator>Hyunchul Cho</creator><creator>Sunghoon Ahn</creator><creator>Yonghwan Hong</creator><creator>Ingon Yang</creator><creator>Byoungyoung Kim</creator><creator>Pilseon Yoo</creator><creator>Youngdon Jung</creator><creator>Jinwoo Lee</creator><creator>Jaehyeon Shin</creator><creator>Taeyun Kim</creator><creator>Kunwoo Park</creator><creator>Jinwoong Kim</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201402</creationdate><title>19.2 A 93.4mm2 64Gb MLC NAND-flash memory with 16nm CMOS technology</title><author>Sungdae Choi ; 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| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0193-6530 |
| ispartof | 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014, p.328-329 |
| issn | 0193-6530 2376-8606 |
| language | eng |
| recordid | cdi_ieee_primary_6757455 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Computer architecture Couplings Flash memories Integrated circuit interconnections Microprocessors Noise Sensors |
| title | 19.2 A 93.4mm2 64Gb MLC NAND-flash memory with 16nm CMOS technology |
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