PMOS-switching-biased voltage-control-oscillator

A PMOS switching-biased VCO is investigated and fabricated by using TSMC 0.35 μm CMOS technology with 2.8 V power supply voltage. A switching bias is employed for the PMOS tail transistor to improve the phase noise. Measured tuning range is ranged from 2.87 GHz to 3.2 GHz. At 1 MHz offset from the c...

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Hauptverfasser:	Te-Feng Chiao, Ming-Cheng Tu, Han-Hsin Wu, Yao-Jia Gao, Peng Kao, Jheng-Wei Wu, Sing-Jhang Cai, Chih-Ho Tu, Sheng-Wen Chen, Janne-Wha Wu, Ching-Wen Tang
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS integrated circuits Frequency measurement Phase noise PMOS Semiconductor device measurement Switching Bias Transistors Voltage Control Oscillator Voltage-controlled oscillators
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Beschreibung
Zusammenfassung:	A PMOS switching-biased VCO is investigated and fabricated by using TSMC 0.35 μm CMOS technology with 2.8 V power supply voltage. A switching bias is employed for the PMOS tail transistor to improve the phase noise. Measured tuning range is ranged from 2.87 GHz to 3.2 GHz. At 1 MHz offset from the carrier, the measured phase noise is -118.2 dBc/Hz. The chip takes 0.32 mm 2 area. For a 0.35mm process, under the consideration of output power, this design shows better performance over the figure of merit.
ISSN:	2165-4727 2165-4743
DOI:	10.1109/APMC.2013.6694920