A software-based self-test strategy for on-line testing of the scan chain circuitries in embedded microprocessors
Nowadays, Software-Based Self-Test (SBST) is growing in importance especially in the on-line test scenario for safety critical systems such as automotive. This paper concentrates on the coverage by SBST of those faults in the scan chain that can impact the behavior of the embedded processor while wo...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | Nowadays, Software-Based Self-Test (SBST) is growing in importance especially in the on-line test scenario for safety critical systems such as automotive. This paper concentrates on the coverage by SBST of those faults in the scan chain that can impact the behavior of the embedded processor while working in its application field. A technique is described that is able to systematically tackle these faults after a scan chain analysis. Results are demonstrating the effectiveness and showing the costs of the proposed approach on a 32-bit embedded processor included in an industrial System-on-Chip used in the automotive field. |
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ISSN: | 1942-9398 1942-9401 |
DOI: | 10.1109/IOLTS.2013.6604055 |