A 700-V Device in High-Voltage Power ICs With Low On-State Resistance and Enhanced SOA

This paper presents a 700-V high-voltage laterally diffused metal-oxide-semiconductor (LDMOS) field-effect transistor with a p-body_Extension reduce surface field (RESURF) structure. Experimental results demonstrate that the low ON resistance and breakdown voltage (BV)- RON,sp figure of merit approach the ideal Baliga's power law, in addition, breaks the quasi-saturation limitation with enhanced device safe operating area (SOA). The optimal charge balance and geometrical design to achieve the lowest specific ON resistance (RON,sp) with the desired maximum high BV are displayed and discussed by simulations and experimental results. The 2-D simulations confirmed that, compared with conventional triple-RESURF structures, the presented device provides a fourfold reduction in the surface electric field on the source side and a 32% improvement in blocking voltage. The specific ON resistance demonstrates superior 40% lower performance than published Junction Isolation LDMOS device families. In addition, its twofold increase in SOA extension can improve the performance of circuit designs for switching power supply applications.