Comparative Performance Analysis of High Density and Efficiency PFC Topologies

In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back...

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Veröffentlicht in:IEEE transactions on power electronics 2014-06, Vol.29 (6), p.2666-2679
Hauptverfasser: KIM, Yun-Sung, SUNG, Won-Yong, LEE, Byoung-Kuk
Format: Artikel
Sprache:eng
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Zusammenfassung:In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back bridgeless boost PFC, and a semi-bridgeless boost PFC, are assessed through loss analysis and simulation using whole height 1 U and 2 kW class prototypes. Based on this, an optimal topology is selected for which an additional comparative analysis involving input line measure improvement control is conducted. The results of these experiments can be adapted for use in the circuit selection of high-performance converters with power factor improvement circuits.
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2013.2275739