Path verification using Boolean satisfiability

Path verification using Boolean satisfiability

The importance of identifying false paths in a combinational circuit cannot be overstated since they may mask the true delay. We present a fast algorithm based on Boolean satisfiability for solving this problem. We also present extensions to this per-path approach to find the critical path of a circ...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Ringe, M., Lindenkreuz, T., Barke, E.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Benchmark testing
Combinational circuits
Data structures
Delay
Design automation
Integrated circuit interconnections
Microelectronics
Pins
Sun
Timing
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Beschreibung
Zusammenfassung:The importance of identifying false paths in a combinational circuit cannot be overstated since they may mask the true delay. We present a fast algorithm based on Boolean satisfiability for solving this problem. We also present extensions to this per-path approach to find the critical path of a circuit in a reasonable time.
DOI:10.1109/DATE.1998.655991