Integration of silicon photonics in a bulk CMOS memory flow
Monolithically integrated silicon photonic (SiP) devices have been demonstrated using a modified bulk CMOS flow. Integration was achieved by nominally extending existing process and design collateral without shifting the CMOS parameterization.
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| creator | Meade, Roy Tehar-Zahav, Ofer Sternberg, Zvi Megged, Efraim Sandhu, Gurtej Orcutt, Jason S. Ram, Rajeev Stojanovic, Vladimir Watts, Michael R. Timurdogan, Erman Shainline, Jeffrey Popovic, Milos |
| description | Monolithically integrated silicon photonic (SiP) devices have been demonstrated using a modified bulk CMOS flow. Integration was achieved by nominally extending existing process and design collateral without shifting the CMOS parameterization. |
| doi_str_mv | 10.1109/OIC.2013.6552950 |
| format | Conference Proceeding |
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| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 2376-8665 |
| ispartof | 2013 Optical Interconnects Conference, 2013, p.114-115 |
| issn | 2376-8665 |
| language | eng |
| recordid | cdi_ieee_primary_6552950 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Adaptive optics Attenuation bulk CMOS CMOS integrated circuits Optical device fabrication Optical interconnections Optical waveguides Random access memory |
| title | Integration of silicon photonics in a bulk CMOS memory flow |
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