Integration of silicon photonics in a bulk CMOS memory flow

Monolithically integrated silicon photonic (SiP) devices have been demonstrated using a modified bulk CMOS flow. Integration was achieved by nominally extending existing process and design collateral without shifting the CMOS parameterization.

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Bibliographische Detailangaben
Hauptverfasser: Meade, Roy, Tehar-Zahav, Ofer, Sternberg, Zvi, Megged, Efraim, Sandhu, Gurtej, Orcutt, Jason S., Ram, Rajeev, Stojanovic, Vladimir, Watts, Michael R., Timurdogan, Erman, Shainline, Jeffrey, Popovic, Milos
Format: Tagungsbericht
Sprache:eng
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Beschreibung
Zusammenfassung:Monolithically integrated silicon photonic (SiP) devices have been demonstrated using a modified bulk CMOS flow. Integration was achieved by nominally extending existing process and design collateral without shifting the CMOS parameterization.
ISSN:2376-8665
DOI:10.1109/OIC.2013.6552950