Front-end ASIC for high-resolution and high rate CsI(Tl)-Si detectors

A front-end application specific integrated circuit (ASIC) was designed and fabricated in a commercial 2.5 V 0.25 μm CMOS technology. It was optimized for pixelated CsI(TI)/Si sensors, and it can process signals from 128 anodes. Each channel comprises a low-noise charge amplification stage, high order shaping, and a number of optional processing circuits. The ASIC can operate in three different modes: spectrum (peak- and time-measurement of signals above thresholds), photon counting (counting of signals within an energy window) and current-integrating for very high rate. The ASIC offers, with a CsI(TI)/Si detector connected, a resolution of 86 e - at 12 μs peaking time, and dissipates about 2.4 mW per channel. The sensitivity of the current-integrating circuit is in the range of 2.6 - 3 m V /fC/kHz.