Implement of a 3D stacked module using edge-interconnect

The ever-increasing circuit density and performance of integrated circuit bring the improvement of design difficulty. Edge-interconnect of SIP technology can reduce the design complexity and system size, improve system reliability and performance. This paper presents a CPU packaging configured with...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Xiongbo Zhao, Penglong Jiang, Liangliang Liu
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Assembly Integrated circuit interconnections Packaging Random access memory Reliability Stacking Surface treatment
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!