Implement of a 3D stacked module using edge-interconnect

The ever-increasing circuit density and performance of integrated circuit bring the improvement of design difficulty. Edge-interconnect of SIP technology can reduce the design complexity and system size, improve system reliability and performance. This paper presents a CPU packaging configured with three-dimensionally (3D) integrated SRAM, Flash and some peripheral chips. Signal communication between them is achieved by using edge-interconnect which is implemented by several complex processes, stacking, potting, cutting, gilding and laser engraving etc. Heat dissipation of the packaging is also considered. And the end product has passed functional test and environmental test.