Estimating the starting point of conduction in nanoscale CMOS gates

In this paper a method for calculating the starting point of conduction of parallel and serial transistor structures in CMOS gates for the nanoscale regime is introduced. The calculation of the starting point is necessary for modeling the operation of complex gates. The influence of the parasitic ca...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Tzagkas, D., Nikolaidis, S., Rjoub, A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Capacitance Integrated circuit modeling Logic gates Mathematical model Semiconductor device modeling Subthreshold current Transistors
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