A differential complementary hartley CMOS voltage controlled oscillator

This letter presents a novel complementary low phase noise differential CMOS Hartley voltage-controlled oscillator (VCO), which uses only the supply voltage and the tuning voltage as the biases. The low noise CMOS VCO has been implemented with the TSMC 0.18 um 1P6M polycide CMOS technology. The VCO...

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Hauptverfasser: Sheng-Lyang Jang, Heng-Fa Teng, Wei-Hao Lee, Chia-Wei Chang
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:This letter presents a novel complementary low phase noise differential CMOS Hartley voltage-controlled oscillator (VCO), which uses only the supply voltage and the tuning voltage as the biases. The low noise CMOS VCO has been implemented with the TSMC 0.18 um 1P6M polycide CMOS technology. The VCO operates from 5.49 GHz to 6.29 GHz with 13.58% tuning range. The measured phase noise at 1-MHz offset is -118.42 dBc/Hz at 5.65 GHz. The power consumption of the VCO core is 1.694 mW. The VCO occupies a chip area of 0.529 × 0.674 mm 2 and provides a figure of merit of -191.09 dBc/Hz. At the supply voltage of 1.1V, the core current of 1.54 mA, the core power consumption is 1.694 mW.
ISSN:2165-4727
2165-4743
DOI:10.1109/APMC.2012.6421875