A 1-V programmable DSP for wireless communications [CMOS]

In an effort to extend battery life, the manufacturers of portable consumer electronics are continually driving down the supply voltages of their systems. For example, next-generation cellular phones are expected to utilize a 1-V power supply for their digital component. To address this market, an e...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE journal of solid-state circuits 1997-11, Vol.32 (11), p.1766-1776
Hauptverfasser: Wai Lee, Landman, P.E., Barton, B., Abiko, S., Takahashi, H., Mizuno, H., Muramatsu, S., Tashiro, K., Fusumada, M., Luat Pham, Boutaud, F., Ego, E., Gallo, G., Hiep Tran, Lemonds, C., Shih, A., Nandakumar, M., Eklund, R.H., Ih-Chin Chen
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In an effort to extend battery life, the manufacturers of portable consumer electronics are continually driving down the supply voltages of their systems. For example, next-generation cellular phones are expected to utilize a 1-V power supply for their digital component. To address this market, an energy-efficient, programmable digital signal processing (DSP) chip that operates from a 1-V supply has been designed, fabricated, and tested. The DSP features an instruction set and micro-architecture that are specifically targeted at wireless communication applications and that have been carefully optimized to minimize power consumption without sacrificing performance. The design utilizes a 0.35-/spl mu/m dual-V/sub t/ technology with 0.25-/spl mu/m minimum gate lengths that enables good performance at 1 V. Specifically, the chip dissipates 17 mW at 1 V, achieving 63-MHz operation with a power-performance metric of 0.21 mW/MHz.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.641699