Assessment of Influence of Impedance Mismatch in ULSI Devices on Electromigration of Copper Interconnection Lines

In this work, the impact of impedance mismatch between on-die CMOS drivers and driven transmission lines on electromigration (EM) and Joule-heating failure mechanisms has been qualitatively studied. Signals corrupted by the impedance mismatch were experimentally measured within a 45-nm CMOS technology ULSI test chip. The signals' current waveforms were obtained using a SPICE simulator. These voltage and current waveforms have been taken as a basis for our calculations. The results reveal that distortions of current shape, which are caused by the mismatched output impedance of a CMOS driver, lead to substantial aggravation of the EM and Joule heating in a driven line. Furthermore, it was found that the impedance mismatch causes serious modifications of current shape of a CMOS inverter connected to the far end of the line. This in turn aggravates both EM and Joule heating in the next-stage line that loads this CMOS inverter.