Software in silicon: the methodology behind Sun's GX graphics accelerator architecture

The Sun GX graphics engine uses the host CPU as the main controller and has all its graphics functionality hardwired directly into two large ASICs; the FBC (frame buffer controller) and TEC (transformation engine and cursor). The GX has only three instructions: rendering arbitrary, filled quadrilaterals; displaying precomputed pixel images; and block image transfers. With these instructions the GX can do at least 80% of the most used functions in its targeted markets: window systems, 2-D geometry, and 3-D wireframe. The criteria, limitations, and approaches used for the GX architecture design are described. The GX architecture, the technology used in its implementation, the functionality and performance needed by applications, and future enhancements to the GX family of graphics devices are presented.< >