A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control
An energy-efficient SoC with 32 b subthreshold RISC processor cores, 32 kB conventional cache memory, and 9T ultra-low voltage (ULV) SRAM based on a flexible and extensible architecture was fabricated on a 2.7 mm 2 test chip in 65 nm low power CMOS. The processor cores are based on a custom standard...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 2013-01, Vol.48 (1), p.8-19 |
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| container_title | IEEE journal of solid-state circuits |
| container_volume | 48 |
| creator | Lutkemeier, Sven Jungeblut, Thorsten Berge, Hans Kristian Otnes Aunet, Snorre Porrmann, Mario Ruckert, Ulrich |
| description | An energy-efficient SoC with 32 b subthreshold RISC processor cores, 32 kB conventional cache memory, and 9T ultra-low voltage (ULV) SRAM based on a flexible and extensible architecture was fabricated on a 2.7 mm 2 test chip in 65 nm low power CMOS. The processor cores are based on a custom standard cell library that was designed using a multiobjective approach to optimize noise margins, switching energy, and propagation delay simultaneously. The cores operate over a supply voltage range from 200 mV (best samples) to 1.2 V with clock frequencies from 10 kHz to 94 MHz at room temperature. The lowest energy consumption per cycle of 9.94 pJ is observed at 325 mV and 133 kHz. A 2 kb ULV SRAM macro achieves minimum energy per operation at averages of 321 mV (0.030 σ/μ), 567 fJ (0.037 σ/μ), and 730 kHz (0.184 σ/μ), for equal number of 32 b read/write operations. The off-chip performance and power management subsystem provides dynamic voltage and frequency scaling (DVFS) combined with an adaptive supply voltage generation for dynamic PVT compensation. |
| doi_str_mv | 10.1109/JSSC.2012.2220671 |
| format | Article |
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The processor cores are based on a custom standard cell library that was designed using a multiobjective approach to optimize noise margins, switching energy, and propagation delay simultaneously. The cores operate over a supply voltage range from 200 mV (best samples) to 1.2 V with clock frequencies from 10 kHz to 94 MHz at room temperature. The lowest energy consumption per cycle of 9.94 pJ is observed at 325 mV and 133 kHz. A 2 kb ULV SRAM macro achieves minimum energy per operation at averages of 321 mV (0.030 σ/μ), 567 fJ (0.037 σ/μ), and 730 kHz (0.184 σ/μ), for equal number of 32 b read/write operations. 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Passive components, printed wiring boards, connectics ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; low voltage SRAM ; Microprocessors ; Power electronics, power supplies ; Random access memory ; RISC processors ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Semiconductors ; Static random access memory ; subthreshold ; System-on-a-chip ; Transistors ; ultra-low power ; Voltage</subject><ispartof>IEEE journal of solid-state circuits, 2013-01, Vol.48 (1), p.8-19</ispartof><rights>2014 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The off-chip performance and power management subsystem provides dynamic voltage and frequency scaling (DVFS) combined with an adaptive supply voltage generation for dynamic PVT compensation.</description><subject>Applied sciences</subject><subject>Clocks</subject><subject>CMOS digital integrated circuits</subject><subject>Compensation</subject><subject>Computer architecture</subject><subject>Delay</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>dynamic voltage scaling</subject><subject>Dynamics</subject><subject>Electric potential</subject><subject>Electrical engineering. Electrical power engineering</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>low voltage SRAM</subject><subject>Microprocessors</subject><subject>Power electronics, power supplies</subject><subject>Random access memory</subject><subject>RISC processors</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Semiconductors</subject><subject>Static random access memory</subject><subject>subthreshold</subject><subject>System-on-a-chip</subject><subject>Transistors</subject><subject>ultra-low power</subject><subject>Voltage</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE2LFDEQhhtRcFz9AeIlIIKXHlNJJ50ch2H9YhfFWVcvEpJ04vSS6bRJWth_b4YZ9uCpKOp5X4qnaV4CXgNg-e7zbrddEwxkTQjBvIdHzQoYEy309OfjZoUxiFYSjJ82z3K-q2vXCVg1vzaIMzQdECXIoN1iyj65vI9hQF9TtC7nmNCPseyRvEHXSyhje1vQ7tvmGulpQJtBz2X862pynsM9uo2h6N8ObeNUUgzPmydeh-xenOdF8_395c32Y3v15cOn7eaqtZTx0koriMbSEMwE93SwErvBeksH3JneOCks8MEZQyRob4Q3QB0wLLvOCOc9vWjennrnFP8sLhd1GLN1IejJxSUroMA445Wv6Ov_0Lu4pKl-p4DwCnEmaaXgRNkUc07OqzmNB53uFWB1FK6OwtVRuDoLr5k352adrQ4-6cmO-SFIeuhxz_rKvTpxo3Pu4cwpkwJj-g9fYIcm</recordid><startdate>201301</startdate><enddate>201301</enddate><creator>Lutkemeier, Sven</creator><creator>Jungeblut, Thorsten</creator><creator>Berge, Hans Kristian Otnes</creator><creator>Aunet, Snorre</creator><creator>Porrmann, Mario</creator><creator>Ruckert, Ulrich</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Operation analysis. Testing</topic><topic>dynamic voltage scaling</topic><topic>Dynamics</topic><topic>Electric potential</topic><topic>Electrical engineering. Electrical power engineering</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>low voltage SRAM</topic><topic>Microprocessors</topic><topic>Power electronics, power supplies</topic><topic>Random access memory</topic><topic>RISC processors</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. 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| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 2013-01, Vol.48 (1), p.8-19 |
| issn | 0018-9200 1558-173X |
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| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Clocks CMOS digital integrated circuits Compensation Computer architecture Delay Design. Technologies. Operation analysis. Testing dynamic voltage scaling Dynamics Electric potential Electrical engineering. Electrical power engineering Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) low voltage SRAM Microprocessors Power electronics, power supplies Random access memory RISC processors Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductors Static random access memory subthreshold System-on-a-chip Transistors ultra-low power Voltage |
| title | A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control |
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