A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver

A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power d...

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Veröffentlicht in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2013-02, Vol.60 (2), p.457-468
Hauptverfasser: Bongsub Song, Kyunghoon Kim, Junan Lee, Jinwook Burm
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Kyunghoon Kim
Junan Lee
Jinwook Burm
description A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM technique, the dual-mode 10-PAM technique can reduce power dissipation by 62.5%. The transmitter including a pseudo random bit sequence (PRBS) generator, multiplexers, an encoder, and an output driver achieves 10-Gb/s data-rate with 235-mW power dissipation such that the figure of merit (FOM) of the transmitter part is 23.5 mW/(Gb/s). The receiver including a flash type analog-to-digital converter (ADC), a decoder, and output drivers achieves 10-Gb/s data-rate and 10 -12 BER with 190-mW power dissipation such that FOM of the receiver part is 19 mW/(Gb/s). The proposed 10-PAM transceiver was implemented in a 0.18-μm standard CMOS technology with 0.3 × 0.8-mm 2 active area.
doi_str_mv 10.1109/TCSI.2012.2215799
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fullrecord <record><control><sourceid>ieee_RIE</sourceid><recordid>TN_cdi_ieee_primary_6327620</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6327620</ieee_id><sourcerecordid>6327620</sourcerecordid><originalsourceid>FETCH-ieee_primary_63276203</originalsourceid><addsrcrecordid>eNp9jN8KgjAcRkcUZH8eILrZC0x_m6nbpVhWkBTovaxasFKTDYPevoSuu_oO58CH0IKCSykIr0jyvcuAMpcxGkRCDJBDg4AT4BAOe14Jwn3Gx2hi7R2ACfCpg9IYfx848Wxb4brzapxkxxxTINuzZ_G6kxXJnlfVm1Oc4VwZLSt80M0DF0Y29qL0S5kZGt1kZdX8t1O0TDdFsiNaKVW2RtfSvMvQZ1HIwP9fP9P2N0o</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver</title><source>IEEE Electronic Library (IEL)</source><creator>Bongsub Song ; Kyunghoon Kim ; Junan Lee ; Jinwook Burm</creator><creatorcontrib>Bongsub Song ; Kyunghoon Kim ; Junan Lee ; Jinwook Burm</creatorcontrib><description>A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM technique, the dual-mode 10-PAM technique can reduce power dissipation by 62.5%. The transmitter including a pseudo random bit sequence (PRBS) generator, multiplexers, an encoder, and an output driver achieves 10-Gb/s data-rate with 235-mW power dissipation such that the figure of merit (FOM) of the transmitter part is 23.5 mW/(Gb/s). The receiver including a flash type analog-to-digital converter (ADC), a decoder, and output drivers achieves 10-Gb/s data-rate and 10 -12 BER with 190-mW power dissipation such that FOM of the receiver part is 19 mW/(Gb/s). The proposed 10-PAM transceiver was implemented in a 0.18-μm standard CMOS technology with 0.3 × 0.8-mm 2 active area.</description><identifier>ISSN: 1549-8328</identifier><identifier>EISSN: 1558-0806</identifier><identifier>DOI: 10.1109/TCSI.2012.2215799</identifier><identifier>CODEN: ITCSCH</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS ; CMOS integrated circuits ; current mode logic (CML) ; high-speed integrated circuits ; Logic gates ; Power dissipation ; pulse-amplitude modulation (PAM) ; Receivers ; serial link ; transceiver ; Transceivers ; Transmitters</subject><ispartof>IEEE transactions on circuits and systems. I, Regular papers, 2013-02, Vol.60 (2), p.457-468</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6327620$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27922,27923,54756</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6327620$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Bongsub Song</creatorcontrib><creatorcontrib>Kyunghoon Kim</creatorcontrib><creatorcontrib>Junan Lee</creatorcontrib><creatorcontrib>Jinwook Burm</creatorcontrib><title>A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver</title><title>IEEE transactions on circuits and systems. I, Regular papers</title><addtitle>TCSI</addtitle><description>A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM technique, the dual-mode 10-PAM technique can reduce power dissipation by 62.5%. The transmitter including a pseudo random bit sequence (PRBS) generator, multiplexers, an encoder, and an output driver achieves 10-Gb/s data-rate with 235-mW power dissipation such that the figure of merit (FOM) of the transmitter part is 23.5 mW/(Gb/s). The receiver including a flash type analog-to-digital converter (ADC), a decoder, and output drivers achieves 10-Gb/s data-rate and 10 -12 BER with 190-mW power dissipation such that FOM of the receiver part is 19 mW/(Gb/s). The proposed 10-PAM transceiver was implemented in a 0.18-μm standard CMOS technology with 0.3 × 0.8-mm 2 active area.</description><subject>CMOS</subject><subject>CMOS integrated circuits</subject><subject>current mode logic (CML)</subject><subject>high-speed integrated circuits</subject><subject>Logic gates</subject><subject>Power dissipation</subject><subject>pulse-amplitude modulation (PAM)</subject><subject>Receivers</subject><subject>serial link</subject><subject>transceiver</subject><subject>Transceivers</subject><subject>Transmitters</subject><issn>1549-8328</issn><issn>1558-0806</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9jN8KgjAcRkcUZH8eILrZC0x_m6nbpVhWkBTovaxasFKTDYPevoSuu_oO58CH0IKCSykIr0jyvcuAMpcxGkRCDJBDg4AT4BAOe14Jwn3Gx2hi7R2ACfCpg9IYfx848Wxb4brzapxkxxxTINuzZ_G6kxXJnlfVm1Oc4VwZLSt80M0DF0Y29qL0S5kZGt1kZdX8t1O0TDdFsiNaKVW2RtfSvMvQZ1HIwP9fP9P2N0o</recordid><startdate>201302</startdate><enddate>201302</enddate><creator>Bongsub Song</creator><creator>Kyunghoon Kim</creator><creator>Junan Lee</creator><creator>Jinwook Burm</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope></search><sort><creationdate>201302</creationdate><title>A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver</title><author>Bongsub Song ; Kyunghoon Kim ; Junan Lee ; Jinwook Burm</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_63276203</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>CMOS</topic><topic>CMOS integrated circuits</topic><topic>current mode logic (CML)</topic><topic>high-speed integrated circuits</topic><topic>Logic gates</topic><topic>Power dissipation</topic><topic>pulse-amplitude modulation (PAM)</topic><topic>Receivers</topic><topic>serial link</topic><topic>transceiver</topic><topic>Transceivers</topic><topic>Transmitters</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Bongsub Song</creatorcontrib><creatorcontrib>Kyunghoon Kim</creatorcontrib><creatorcontrib>Junan Lee</creatorcontrib><creatorcontrib>Jinwook Burm</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bongsub Song</au><au>Kyunghoon Kim</au><au>Junan Lee</au><au>Jinwook Burm</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver</atitle><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle><stitle>TCSI</stitle><date>2013-02</date><risdate>2013</risdate><volume>60</volume><issue>2</issue><spage>457</spage><epage>468</epage><pages>457-468</pages><issn>1549-8328</issn><eissn>1558-0806</eissn><coden>ITCSCH</coden><abstract>A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM technique, the dual-mode 10-PAM technique can reduce power dissipation by 62.5%. The transmitter including a pseudo random bit sequence (PRBS) generator, multiplexers, an encoder, and an output driver achieves 10-Gb/s data-rate with 235-mW power dissipation such that the figure of merit (FOM) of the transmitter part is 23.5 mW/(Gb/s). The receiver including a flash type analog-to-digital converter (ADC), a decoder, and output drivers achieves 10-Gb/s data-rate and 10 -12 BER with 190-mW power dissipation such that FOM of the receiver part is 19 mW/(Gb/s). The proposed 10-PAM transceiver was implemented in a 0.18-μm standard CMOS technology with 0.3 × 0.8-mm 2 active area.</abstract><pub>IEEE</pub><doi>10.1109/TCSI.2012.2215799</doi></addata></record>
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subjects CMOS
CMOS integrated circuits
current mode logic (CML)
high-speed integrated circuits
Logic gates
Power dissipation
pulse-amplitude modulation (PAM)
Receivers
serial link
transceiver
Transceivers
Transmitters
title A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T14%3A08%3A21IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%200.18-/spl%20mu/m%20CMOS%2010-Gb/s%20Dual-Mode%2010-PAM%20Serial%20Link%20Transceiver&rft.jtitle=IEEE%20transactions%20on%20circuits%20and%20systems.%20I,%20Regular%20papers&rft.au=Bongsub%20Song&rft.date=2013-02&rft.volume=60&rft.issue=2&rft.spage=457&rft.epage=468&rft.pages=457-468&rft.issn=1549-8328&rft.eissn=1558-0806&rft.coden=ITCSCH&rft_id=info:doi/10.1109/TCSI.2012.2215799&rft_dat=%3Cieee_RIE%3E6327620%3C/ieee_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6327620&rfr_iscdi=true