A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver

A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power d...

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Veröffentlicht in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2013-02, Vol.60 (2), p.457-468
Hauptverfasser: Bongsub Song, Kyunghoon Kim, Junan Lee, Jinwook Burm
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Sprache:eng
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Zusammenfassung:A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM technique, the dual-mode 10-PAM technique can reduce power dissipation by 62.5%. The transmitter including a pseudo random bit sequence (PRBS) generator, multiplexers, an encoder, and an output driver achieves 10-Gb/s data-rate with 235-mW power dissipation such that the figure of merit (FOM) of the transmitter part is 23.5 mW/(Gb/s). The receiver including a flash type analog-to-digital converter (ADC), a decoder, and output drivers achieves 10-Gb/s data-rate and 10 -12 BER with 190-mW power dissipation such that FOM of the receiver part is 19 mW/(Gb/s). The proposed 10-PAM transceiver was implemented in a 0.18-μm standard CMOS technology with 0.3 × 0.8-mm 2 active area.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2012.2215799