A 2.7-mW 145dB-SQNR sigma delta modulator

A high resolution low power sigma delta modulator for analog to digital conversion (ADC) over 20 KHz range is presented. The modulator consists of a fourth order design operating at a baseband frequency of 20 KHz with an oversampling ratio (OSR) of 256. A continuous time active RC loop filter based...

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Hauptverfasser: Sohel, M. A., Reddy, K. Chenna Keshava, Sattar, S. A.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:A high resolution low power sigma delta modulator for analog to digital conversion (ADC) over 20 KHz range is presented. The modulator consists of a fourth order design operating at a baseband frequency of 20 KHz with an oversampling ratio (OSR) of 256. A continuous time active RC loop filter based design is implemented, which achieves a Signal to Quantization Noise Ratio (SQNR) of 145dB leading to a 24 bit resolution of the ADC. A very low power consumption of 2.7 mW at a supply voltage of 1.8V is achieved in 0.18micron CMOS technology. A CIFB topology is chosen to implement the modulator which supports stable operation at large resolution.
DOI:10.1109/ICACCCT.2012.6320765