Design of Prefix-Based Optimal Reversible Comparator

This paper presents a design of prefix grouping based reversible comparator. Reversible computing has emerged as promising technology having its applications in emerging technologies like quantum computing, optical computing etc. The proposed reversible comparator design consists of three stages. The first stage consists of a 1-bit comparator where two outputs, g i indicating A i >; B i and e i indicating A i = B i , are generated for i th operand bits. The outputs of 1-bit comparator stage are grouped in the second stage using prefix grouping and the final outputs G indicating A >; B and E indicating A=B are generated. In the last stage the outputs of second stage i.e. G and E are used to generate L signal indicating A