Novel simulation of deep-submicron MOSFET circuits

Novel simulation of deep-submicron MOSFET circuits

The effects of scaling down the MOSFET dimensions to the deep-submicron range lead to operating regions that may be modeled by locally linear equations. The piecewise linear simulator seems to be the obvious choice. Certain requirements must be satisfied by a PL simulator for the successful manipula...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Bruma, S., Otten, R.H.J.M.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuit simulation
CMOS technology
Energy consumption
Integrated circuit interconnections
Integrated circuit technology
MOSFET circuits
Piecewise linear techniques
Semiconductor device modeling
Very large scale integration
Voltage
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Beschreibung
Zusammenfassung:The effects of scaling down the MOSFET dimensions to the deep-submicron range lead to operating regions that may be modeled by locally linear equations. The piecewise linear simulator seems to be the obvious choice. Certain requirements must be satisfied by a PL simulator for the successful manipulation of the proposed MOSFET model. Simulation results demonstrate the efficiency in simulating large deep-submicron MOSFET circuits. Several levels of hierarchy can be simulated due to the uniform PL modeling technique.
ISSN:1063-6404
2576-6996
DOI:10.1109/ICCD.1997.628850