A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS

A fully integrated 79-to-87GHz cascading frequency synthesizer, which combines a W-band push-push ×4 frequency multiplier and a K-band divider-less fundamental PLL with sampling phase detector, is implemented in a standard 65nm CMOS process. It consumes low power of 54mW, achieves as low as −100.1dB...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Le Ye, Yixiao Wang, Congyin Shi, Huailin Liao, Ru Huang
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS CMOS integrated circuits divider-less Frequency conversion Frequency measurement frequency multiplier Frequency synthesizer Frequency synthesizers millimeter-wave Phase locked loops Phase noise PLL Voltage-controlled oscillators W-band
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page	3
container_issue
container_start_page	1
container_title
container_volume
creator	Le Ye Yixiao Wang Congyin Shi Huailin Liao Ru Huang
description	A fully integrated 79-to-87GHz cascading frequency synthesizer, which combines a W-band push-push ×4 frequency multiplier and a K-band divider-less fundamental PLL with sampling phase detector, is implemented in a standard 65nm CMOS process. It consumes low power of 54mW, achieves as low as −100.1dBc/Hz @ 100kHz and −106.2dBc/Hz @ 1MHz phase noise performance at divide-by-2 frequency, covers 9.6% tuning range from 79 to 87GHz, and occupies smaller than 1.48×0.8 mm 2 silicon area. This frequency synthesizer is qualified to support 81-to-86GHz point-to-point high speed data link.
doi_str_mv	10.1109/MWSYM.2012.6258384
format	Conference Proceeding
fullrecord	<record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6258384</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6258384</ieee_id><sourcerecordid>6258384</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-903a104442585cca4dd1642493afe038786ed0eccebf51c7cd8307e73cec52363</originalsourceid><addsrcrecordid>eNpNkN1KAzEQheMfWGtfQG_yAqnJ5ncvS_EPtlRooXpV0mTWRnaXutkqqw_iA_librGgc3GGwzl8MIPQBaNDxmh6NVnMnibDhLJkqBJpuBEH6IwJpTmjRulD1EukVkQnTB39BTI9Rj3KREqUkI-naBDjC-1GG8ZS00OfI7wgK1t57MNb8FCTAmLEzkZnfaiecV7D6xYq1-LYVs0aYviAGr-HZo0327gmO8HfX-JfsdwWTdgUoevtwNGWnelQD1mGQ4WVrEo8nkxn5-gkt0WEwX730fzmej6-I9n09n48ykhIaUNSyi2jQojuaOmcFd4zJRKRcpsD5UYbBZ6Cc7DKJXPaecOpBs0dOJlwxfvo8hcbAGC5qUNp63a5_yH_AfAYYzU</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Le Ye ; Yixiao Wang ; Congyin Shi ; Huailin Liao ; Ru Huang</creator><creatorcontrib>Le Ye ; Yixiao Wang ; Congyin Shi ; Huailin Liao ; Ru Huang</creatorcontrib><description>A fully integrated 79-to-87GHz cascading frequency synthesizer, which combines a W-band push-push ×4 frequency multiplier and a K-band divider-less fundamental PLL with sampling phase detector, is implemented in a standard 65nm CMOS process. It consumes low power of 54mW, achieves as low as −100.1dBc/Hz @ 100kHz and −106.2dBc/Hz @ 1MHz phase noise performance at divide-by-2 frequency, covers 9.6% tuning range from 79 to 87GHz, and occupies smaller than 1.48×0.8 mm 2 silicon area. This frequency synthesizer is qualified to support 81-to-86GHz point-to-point high speed data link.</description><identifier>ISSN: 0149-645X</identifier><identifier>ISBN: 1467310859</identifier><identifier>ISBN: 9781467310857</identifier><identifier>EISSN: 2576-7216</identifier><identifier>EISBN: 1467310867</identifier><identifier>EISBN: 1467310875</identifier><identifier>EISBN: 9781467310864</identifier><identifier>EISBN: 9781467310888</identifier><identifier>EISBN: 1467310883</identifier><identifier>EISBN: 9781467310871</identifier><identifier>DOI: 10.1109/MWSYM.2012.6258384</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS ; CMOS integrated circuits ; divider-less ; Frequency conversion ; Frequency measurement ; frequency multiplier ; Frequency synthesizer ; Frequency synthesizers ; millimeter-wave ; Phase locked loops ; Phase noise ; PLL ; Voltage-controlled oscillators ; W-band</subject><ispartof>2012 IEEE/MTT-S International Microwave Symposium Digest, 2012, p.1-3</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6258384$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6258384$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Le Ye</creatorcontrib><creatorcontrib>Yixiao Wang</creatorcontrib><creatorcontrib>Congyin Shi</creatorcontrib><creatorcontrib>Huailin Liao</creatorcontrib><creatorcontrib>Ru Huang</creatorcontrib><title>A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS</title><title>2012 IEEE/MTT-S International Microwave Symposium Digest</title><addtitle>MWSYM</addtitle><description>A fully integrated 79-to-87GHz cascading frequency synthesizer, which combines a W-band push-push ×4 frequency multiplier and a K-band divider-less fundamental PLL with sampling phase detector, is implemented in a standard 65nm CMOS process. It consumes low power of 54mW, achieves as low as −100.1dBc/Hz @ 100kHz and −106.2dBc/Hz @ 1MHz phase noise performance at divide-by-2 frequency, covers 9.6% tuning range from 79 to 87GHz, and occupies smaller than 1.48×0.8 mm 2 silicon area. This frequency synthesizer is qualified to support 81-to-86GHz point-to-point high speed data link.</description><subject>CMOS</subject><subject>CMOS integrated circuits</subject><subject>divider-less</subject><subject>Frequency conversion</subject><subject>Frequency measurement</subject><subject>frequency multiplier</subject><subject>Frequency synthesizer</subject><subject>Frequency synthesizers</subject><subject>millimeter-wave</subject><subject>Phase locked loops</subject><subject>Phase noise</subject><subject>PLL</subject><subject>Voltage-controlled oscillators</subject><subject>W-band</subject><issn>0149-645X</issn><issn>2576-7216</issn><isbn>1467310859</isbn><isbn>9781467310857</isbn><isbn>1467310867</isbn><isbn>1467310875</isbn><isbn>9781467310864</isbn><isbn>9781467310888</isbn><isbn>1467310883</isbn><isbn>9781467310871</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2012</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpNkN1KAzEQheMfWGtfQG_yAqnJ5ncvS_EPtlRooXpV0mTWRnaXutkqqw_iA_librGgc3GGwzl8MIPQBaNDxmh6NVnMnibDhLJkqBJpuBEH6IwJpTmjRulD1EukVkQnTB39BTI9Rj3KREqUkI-naBDjC-1GG8ZS00OfI7wgK1t57MNb8FCTAmLEzkZnfaiecV7D6xYq1-LYVs0aYviAGr-HZo0327gmO8HfX-JfsdwWTdgUoevtwNGWnelQD1mGQ4WVrEo8nkxn5-gkt0WEwX730fzmej6-I9n09n48ykhIaUNSyi2jQojuaOmcFd4zJRKRcpsD5UYbBZ6Cc7DKJXPaecOpBs0dOJlwxfvo8hcbAGC5qUNp63a5_yH_AfAYYzU</recordid><startdate>201206</startdate><enddate>201206</enddate><creator>Le Ye</creator><creator>Yixiao Wang</creator><creator>Congyin Shi</creator><creator>Huailin Liao</creator><creator>Ru Huang</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201206</creationdate><title>A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS</title><author>Le Ye ; Yixiao Wang ; Congyin Shi ; Huailin Liao ; Ru Huang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-903a104442585cca4dd1642493afe038786ed0eccebf51c7cd8307e73cec52363</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2012</creationdate><topic>CMOS</topic><topic>CMOS integrated circuits</topic><topic>divider-less</topic><topic>Frequency conversion</topic><topic>Frequency measurement</topic><topic>frequency multiplier</topic><topic>Frequency synthesizer</topic><topic>Frequency synthesizers</topic><topic>millimeter-wave</topic><topic>Phase locked loops</topic><topic>Phase noise</topic><topic>PLL</topic><topic>Voltage-controlled oscillators</topic><topic>W-band</topic><toplevel>online_resources</toplevel><creatorcontrib>Le Ye</creatorcontrib><creatorcontrib>Yixiao Wang</creatorcontrib><creatorcontrib>Congyin Shi</creatorcontrib><creatorcontrib>Huailin Liao</creatorcontrib><creatorcontrib>Ru Huang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Le Ye</au><au>Yixiao Wang</au><au>Congyin Shi</au><au>Huailin Liao</au><au>Ru Huang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS</atitle><btitle>2012 IEEE/MTT-S International Microwave Symposium Digest</btitle><stitle>MWSYM</stitle><date>2012-06</date><risdate>2012</risdate><spage>1</spage><epage>3</epage><pages>1-3</pages><issn>0149-645X</issn><eissn>2576-7216</eissn><isbn>1467310859</isbn><isbn>9781467310857</isbn><eisbn>1467310867</eisbn><eisbn>1467310875</eisbn><eisbn>9781467310864</eisbn><eisbn>9781467310888</eisbn><eisbn>1467310883</eisbn><eisbn>9781467310871</eisbn><abstract>A fully integrated 79-to-87GHz cascading frequency synthesizer, which combines a W-band push-push ×4 frequency multiplier and a K-band divider-less fundamental PLL with sampling phase detector, is implemented in a standard 65nm CMOS process. It consumes low power of 54mW, achieves as low as −100.1dBc/Hz @ 100kHz and −106.2dBc/Hz @ 1MHz phase noise performance at divide-by-2 frequency, covers 9.6% tuning range from 79 to 87GHz, and occupies smaller than 1.48×0.8 mm 2 silicon area. This frequency synthesizer is qualified to support 81-to-86GHz point-to-point high speed data link.</abstract><pub>IEEE</pub><doi>10.1109/MWSYM.2012.6258384</doi><tpages>3</tpages></addata></record>
fulltext	fulltext_linktorsrc
identifier	ISSN: 0149-645X
ispartof	2012 IEEE/MTT-S International Microwave Symposium Digest, 2012, p.1-3
issn	0149-645X 2576-7216
language	eng
recordid	cdi_ieee_primary_6258384
source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	CMOS CMOS integrated circuits divider-less Frequency conversion Frequency measurement frequency multiplier Frequency synthesizer Frequency synthesizers millimeter-wave Phase locked loops Phase noise PLL Voltage-controlled oscillators W-band
title	A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T10%3A47%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20W-band%20divider-less%20cascading%20frequency%20synthesizer%20with%20push-push%20%C3%974%20frequency%20multiplier%20and%20sampling%20PLL%20in%2065nm%20CMOS&rft.btitle=2012%20IEEE/MTT-S%20International%20Microwave%20Symposium%20Digest&rft.au=Le%20Ye&rft.date=2012-06&rft.spage=1&rft.epage=3&rft.pages=1-3&rft.issn=0149-645X&rft.eissn=2576-7216&rft.isbn=1467310859&rft.isbn_list=9781467310857&rft_id=info:doi/10.1109/MWSYM.2012.6258384&rft_dat=%3Cieee_6IE%3E6258384%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1467310867&rft.eisbn_list=1467310875&rft.eisbn_list=9781467310864&rft.eisbn_list=9781467310888&rft.eisbn_list=1467310883&rft.eisbn_list=9781467310871&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6258384&rfr_iscdi=true