Enhancement of devices performance of hybrid FDSOI/bulk technology by using UTBOX sSOI substrates

For the first time, CMOS devices on UTBOX 25nm combined with strained SOI (sSOI) substrates have been demonstrated. A 20% Ion boost is highlighted with these substrates compared to the standard UTBB SOI ones. Performance up to 1530μA/μm @ Ioff=100nA/μm (Vd 1V) for a nominal Lg=30nm with a CET of 1.5...

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Hauptverfasser: Fenouillet-Beranger, C., Perreau, P., Weber, O., Ben-Akkez, I., Cros, A., Bajolet, A., Haendler, S., Fonteneau, P., Gouraud, P., Richard, E., Abbate, F., Barge, D., Pellissier-Tanon, D., Dumont, B., Andrieu, F., Passieux, J., Bon, R., Barral, V., Golanski, D., Petit, D., Planes, N., Bonin, O., Schwarzenbach, W., Poiroux, T., Faynot, O., Haond, M., Boeuf, F.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:For the first time, CMOS devices on UTBOX 25nm combined with strained SOI (sSOI) substrates have been demonstrated. A 20% Ion boost is highlighted with these substrates compared to the standard UTBB SOI ones. Performance up to 1530μA/μm @ Ioff=100nA/μm (Vd 1V) for a nominal Lg=30nm with a CET of 1.5nm for the NMOS has been achieved. The viability of this substrate has been demonstrated thanks to our hybrid process, through threshold voltage modulation and leakage current reduction, with back biasing for short devices. In addition, cell current improvement of 23% in 0.12μm 2 bitcell is noticed for sSOI at the same stand-by current vs the standard UTBB SOI. Finally, the functionality of hybrid ESD device underneath the BOX is demonstrated.
ISSN:0743-1562
DOI:10.1109/VLSIT.2012.6242488