Net-level reliability analysis for interconnect self-heat

A new connectivity-based design methodology is proposed to model local hotspots due to interconnect joule heating. Compared to prior CAD approach [1], it provides resistor-scale accuracy without additional design complexity impact. Results are validated with test chip data on Intel backend process.

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Bibliographische Detailangaben
Hauptverfasser: Lei Jiang, Pantuso, D., Schmitz, A., Thomas, J.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A new connectivity-based design methodology is proposed to model local hotspots due to interconnect joule heating. Compared to prior CAD approach [1], it provides resistor-scale accuracy without additional design complexity impact. Results are validated with test chip data on Intel backend process.
ISSN:1541-7026
1938-1891
DOI:10.1109/IRPS.2012.6241890