Planar GeOI TFET Performance Improvement With Back Biasing
Reverse back biasing of a planar germanium-on-insulator tunneling field-effect transistor provides for significant improvement in I ON / I OFF , by over an order of magnitude for 0.25 V operating voltage. Optimization of the gate-to-source overlap and source doping gradient is key to maximizing the...
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| Veröffentlicht in: | IEEE transactions on electron devices 2012-06, Vol.59 (6), p.1629-1635 |
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| container_end_page | 1635 |
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| container_issue | 6 |
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| container_title | IEEE transactions on electron devices |
| container_volume | 59 |
| creator | Matheu, P. Byron Ho Jacobson, Z. A. Tsu-Jae King Liu |
| description | Reverse back biasing of a planar germanium-on-insulator tunneling field-effect transistor provides for significant improvement in I ON / I OFF , by over an order of magnitude for 0.25 V operating voltage. Optimization of the gate-to-source overlap and source doping gradient is key to maximizing the benefit of back biasing. |
| doi_str_mv | 10.1109/TED.2012.2191410 |
| format | Article |
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Solid state devices</subject><subject>Silicon</subject><subject>Transistors</subject><subject>Tunneling</subject><subject>tunneling FET (TFET)</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9j01LAzEQhoMoWKt3wUsuHrdmkmw-vNkP60KhPVQ8Ltl0oqvdbUmK4L93l5Yyh2F432fgIeQe2AiA2af1bDriDPiIgwUJ7IIMIM91ZpVUl2TAGJjMCiOuyU1K392ppOQD8rzautZFOsdlQdevszVdYQy72LjWIy2afdz9YoPtgX7Uhy86dv6HjmuX6vbzllwFt014d9pD8t7xk7dssZwXk5dF5rkVhyxoHvjGVuA8VBorpjYOXLBO9-OFNVx4E4z0yrJgsTISdS7yricEBhBDwo5_fdylFDGU-1g3Lv6VwMrevezcy969PLl3yOMR2bvk3TbEzqZOZ47nVlqu-t7DsVcj4jlWYLTmufgHrplg7g</recordid><startdate>20120601</startdate><enddate>20120601</enddate><creator>Matheu, P.</creator><creator>Byron Ho</creator><creator>Jacobson, Z. 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| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 2012-06, Vol.59 (6), p.1629-1635 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_ieee_primary_6187725 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Doping Electrodes Electronics Exact sciences and technology Germanium-on-insulator (GeOI) Junctions Logic gates MOSFET circuits reverse back bias Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Transistors Tunneling tunneling FET (TFET) |
| title | Planar GeOI TFET Performance Improvement With Back Biasing |
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