Planar GeOI TFET Performance Improvement With Back Biasing

Reverse back biasing of a planar germanium-on-insulator tunneling field-effect transistor provides for significant improvement in I ON / I OFF , by over an order of magnitude for 0.25 V operating voltage. Optimization of the gate-to-source overlap and source doping gradient is key to maximizing the...

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Veröffentlicht in:	IEEE transactions on electron devices 2012-06, Vol.59 (6), p.1629-1635
Hauptverfasser:	Matheu, P., Byron Ho, Jacobson, Z. A., Tsu-Jae King Liu
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Doping Electrodes Electronics Exact sciences and technology Germanium-on-insulator (GeOI) Junctions Logic gates MOSFET circuits reverse back bias Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Transistors Tunneling tunneling FET (TFET)
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Beschreibung
Zusammenfassung:	Reverse back biasing of a planar germanium-on-insulator tunneling field-effect transistor provides for significant improvement in I ON / I OFF , by over an order of magnitude for 0.25 V operating voltage. Optimization of the gate-to-source overlap and source doping gradient is key to maximizing the benefit of back biasing.
ISSN:	0018-9383 1557-9646
DOI:	10.1109/TED.2012.2191410