K computer: 8.162 PetaFLOPS massively parallel scalar supercomputer built with over 548k cores
Many high-performance CPUs employ a multicore architecture with a moderate clock frequency and wide instruction issue, including SIMD extensions, to achieve high performance while retaining a practical power consumption. As demand for supercomputer performance grows faster than the rate that improve...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | Many high-performance CPUs employ a multicore architecture with a moderate clock frequency and wide instruction issue, including SIMD extensions, to achieve high performance while retaining a practical power consumption. As demand for supercomputer performance grows faster than the rate that improvements are made to CPU performance, the total number of cores of high-end supercomputers has increased tremendously. Efficient handling of large numbers of cores is a key aspect in the design of supercomputers. Building a supercomputer with lower power consumption and significant reliability is also important from the viewpoints of cost and availability. |
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ISSN: | 0193-6530 2376-8606 |
DOI: | 10.1109/ISSCC.2012.6176971 |