A coarse-grained reconfigurable computing unit

This paper presents a 16-bit coarse-grained reconfigurable computing unit. It consists of computing part and interconnection part. The computing part includes adders/subtractors, shifters and complementers, whereas the interconnection part includes multiplexers. Apart from basic functions, it is cap...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Kanwen Wang, Shuai Chen, Wei Cao, Lingli Wang, Jiarong Tong
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper presents a 16-bit coarse-grained reconfigurable computing unit. It consists of computing part and interconnection part. The computing part includes adders/subtractors, shifters and complementers, whereas the interconnection part includes multiplexers. Apart from basic functions, it is capable of performing 1-output and 2-output constant multiplication, 4-input adder tree, absolute difference and butterfly operation. The implementation results show that the area is 2964 gates with the critical path of 18.24ns under 130-nm CMOS technology.
ISSN:2162-7541
2162-755X
DOI:10.1109/ASICON.2011.6157129