DFT for extremely low cost test of mixed signal SOCs with integrated RF and power management

Mixed signal SOCs with integrated RF and power management modules have some distinct requirements associated with them. They are often used in portable and battery operated consumer applications, which are extremely cost and power sensitive. This translates into a few unique design and test constraints on the amount of DFT logic integrated, the permissible test time, and power-up of individual modules in the SOC. In this paper, we propose some novel DFT and test techniques which have been devised keeping in mind these constraints, and illustrate how test cost has been significantly reduced in such cost and power constrained mixed signal SOCs. The paper discusses three significant components of the test time and techniques for their reduction through smarter DFT and BIST: (i) RF tests in multiple radio modules, (ii) test and calibration of complex power management logic and voltage regulators, and (iii) improved scan ATPG for all the digital logic. These techniques are being integrated into Texas Instruments' embedded SOCs designed for such portable application, resulting in an overall test cost reduction by half over the previous generation of such SOCs.