Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS

Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS

Digital "assist" circuits can improve the efficiency of traditionally analog circuit blocks, especially as technologies scale to the detriment of analog blocks. We apply some of these techniques to a 10 Gbps optical reciever, and demonstrate 395 fJ/b energy efficiency. Digital calibration...

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Hauptverfasser: Amberg, P., Liu, F., Dayringer, M., Lexau, J., Patil, D., Gainsley, J., Moghadam, H. F., Alon, E., Xuezhe Zheng, Cunningham, J. E., Krishnamoorthy, A. V., Ron Ho
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analog circuits
Calibration
Clocks
CMOS integrated circuits
Optical receivers
Photodiodes
Silicon
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Zusammenfassung:Digital "assist" circuits can improve the efficiency of traditionally analog circuit blocks, especially as technologies scale to the detriment of analog blocks. We apply some of these techniques to a 10 Gbps optical reciever, and demonstrate 395 fJ/b energy efficiency. Digital calibration blocks wrapped around a simple analog core enabled offset compensation, TIA biasing, and DLL re-timing, and cost negligible performance and power overhead. The assist circuits cost around 40% area overhead.
DOI:10.1109/ASSCC.2011.6123656