A low power 9GHz divide-by-3 injection locked frequency divider in 0.18μm CMOS with 15% locking range

A new low power divide-by-3 injection locked LC divider is proposed for PLL-based frequency synthesizers. The circuit is made of two voltage controlled oscillators coupled together via four MOSFETs, where capacitors are placed in series with the source of the coupling transistors leading to a reduction in power consumption. The control voltage of the two VCOs are tied together to achieve a wider locking range. A locking range of 1.25 GHz (from 7.9 GHz to 9.15 GHz) was achieved. The divider draws 610μA from a 1.2V supply voltage.