A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link
The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power cons...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , , , , , , , , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng ; jpn |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 4 |
|---|---|
| container_issue | |
| container_start_page | 1 |
| container_title | |
| container_volume | |
| creator | Fukuda, K. Ono, G. Watanabe, K. Muto, T. Yamashita, H. Masuda, N. Nemoto, R. Suzuki, E. Takemoto, T. Yuki, F. Yagyu, M. Toyoda, H. Kono, M. Kambe, A. Umai, S. Saito, T. Nishimura, S. |
| description | The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s). |
| doi_str_mv | 10.1109/CSICS.2011.6062438 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_6062438</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6062438</ieee_id><sourcerecordid>6062438</sourcerecordid><originalsourceid>FETCH-LOGICAL-i156t-d74c6134c530a663e7d4ca6edd057401ab59c2dc426f0f077f69fdffc1e27c723</originalsourceid><addsrcrecordid>eNo1UNlOwkAUHbfEgvyAvswPDN47a8sbKYgkJWiQxDcynUXrQk3bBP17IeLTWXMeDiHXCENEyG7z1TxfDTkgDjVoLkV6QnqokafSIPBTknBhJEulFGdkkJn0P0N1ThJUCli6Ny9Jr23fAMSem4Q8jmm-WK5oUe_YQ70LDUUYSbpYP1O79VSOEOhkepCzYJuy_qbznMb6UAM2q15sWXV02r2GZhs6WlTb9ytyEe1HGwZH7JP13fQpv2fFcjbPxwWrUOmOeSOdRiGdEmC1FsF46awO3oMyEtCWKnPcO8l1hAjGRJ1FH6PDwI0zXPTJzd9uFULYfDXVp21-NsdrxC_hsU7A</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Fukuda, K. ; Ono, G. ; Watanabe, K. ; Muto, T. ; Yamashita, H. ; Masuda, N. ; Nemoto, R. ; Suzuki, E. ; Takemoto, T. ; Yuki, F. ; Yagyu, M. ; Toyoda, H. ; Kono, M. ; Kambe, A. ; Umai, S. ; Saito, T. ; Nishimura, S.</creator><creatorcontrib>Fukuda, K. ; Ono, G. ; Watanabe, K. ; Muto, T. ; Yamashita, H. ; Masuda, N. ; Nemoto, R. ; Suzuki, E. ; Takemoto, T. ; Yuki, F. ; Yagyu, M. ; Toyoda, H. ; Kono, M. ; Kambe, A. ; Umai, S. ; Saito, T. ; Nishimura, S.</creatorcontrib><description>The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).</description><identifier>ISSN: 1550-8781</identifier><identifier>ISBN: 9781612847115</identifier><identifier>ISBN: 1612847110</identifier><identifier>EISSN: 2374-8443</identifier><identifier>EISBN: 1612847102</identifier><identifier>EISBN: 9781612847122</identifier><identifier>EISBN: 9781612847108</identifier><identifier>EISBN: 1612847129</identifier><identifier>DOI: 10.1109/CSICS.2011.6062438</identifier><language>eng ; jpn</language><publisher>IEEE</publisher><subject>Clocks ; Large scale integration ; Optical receivers ; Phase locked loops ; Power demand ; Voltage-controlled oscillators</subject><ispartof>2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2011, p.1-4</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6062438$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6062438$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fukuda, K.</creatorcontrib><creatorcontrib>Ono, G.</creatorcontrib><creatorcontrib>Watanabe, K.</creatorcontrib><creatorcontrib>Muto, T.</creatorcontrib><creatorcontrib>Yamashita, H.</creatorcontrib><creatorcontrib>Masuda, N.</creatorcontrib><creatorcontrib>Nemoto, R.</creatorcontrib><creatorcontrib>Suzuki, E.</creatorcontrib><creatorcontrib>Takemoto, T.</creatorcontrib><creatorcontrib>Yuki, F.</creatorcontrib><creatorcontrib>Yagyu, M.</creatorcontrib><creatorcontrib>Toyoda, H.</creatorcontrib><creatorcontrib>Kono, M.</creatorcontrib><creatorcontrib>Kambe, A.</creatorcontrib><creatorcontrib>Umai, S.</creatorcontrib><creatorcontrib>Saito, T.</creatorcontrib><creatorcontrib>Nishimura, S.</creatorcontrib><title>A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link</title><title>2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)</title><addtitle>CSICS</addtitle><description>The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).</description><subject>Clocks</subject><subject>Large scale integration</subject><subject>Optical receivers</subject><subject>Phase locked loops</subject><subject>Power demand</subject><subject>Voltage-controlled oscillators</subject><issn>1550-8781</issn><issn>2374-8443</issn><isbn>9781612847115</isbn><isbn>1612847110</isbn><isbn>1612847102</isbn><isbn>9781612847122</isbn><isbn>9781612847108</isbn><isbn>1612847129</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2011</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1UNlOwkAUHbfEgvyAvswPDN47a8sbKYgkJWiQxDcynUXrQk3bBP17IeLTWXMeDiHXCENEyG7z1TxfDTkgDjVoLkV6QnqokafSIPBTknBhJEulFGdkkJn0P0N1ThJUCli6Ny9Jr23fAMSem4Q8jmm-WK5oUe_YQ70LDUUYSbpYP1O79VSOEOhkepCzYJuy_qbznMb6UAM2q15sWXV02r2GZhs6WlTb9ytyEe1HGwZH7JP13fQpv2fFcjbPxwWrUOmOeSOdRiGdEmC1FsF46awO3oMyEtCWKnPcO8l1hAjGRJ1FH6PDwI0zXPTJzd9uFULYfDXVp21-NsdrxC_hsU7A</recordid><startdate>201110</startdate><enddate>201110</enddate><creator>Fukuda, K.</creator><creator>Ono, G.</creator><creator>Watanabe, K.</creator><creator>Muto, T.</creator><creator>Yamashita, H.</creator><creator>Masuda, N.</creator><creator>Nemoto, R.</creator><creator>Suzuki, E.</creator><creator>Takemoto, T.</creator><creator>Yuki, F.</creator><creator>Yagyu, M.</creator><creator>Toyoda, H.</creator><creator>Kono, M.</creator><creator>Kambe, A.</creator><creator>Umai, S.</creator><creator>Saito, T.</creator><creator>Nishimura, S.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201110</creationdate><title>A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link</title><author>Fukuda, K. ; Ono, G. ; Watanabe, K. ; Muto, T. ; Yamashita, H. ; Masuda, N. ; Nemoto, R. ; Suzuki, E. ; Takemoto, T. ; Yuki, F. ; Yagyu, M. ; Toyoda, H. ; Kono, M. ; Kambe, A. ; Umai, S. ; Saito, T. ; Nishimura, S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i156t-d74c6134c530a663e7d4ca6edd057401ab59c2dc426f0f077f69fdffc1e27c723</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng ; jpn</language><creationdate>2011</creationdate><topic>Clocks</topic><topic>Large scale integration</topic><topic>Optical receivers</topic><topic>Phase locked loops</topic><topic>Power demand</topic><topic>Voltage-controlled oscillators</topic><toplevel>online_resources</toplevel><creatorcontrib>Fukuda, K.</creatorcontrib><creatorcontrib>Ono, G.</creatorcontrib><creatorcontrib>Watanabe, K.</creatorcontrib><creatorcontrib>Muto, T.</creatorcontrib><creatorcontrib>Yamashita, H.</creatorcontrib><creatorcontrib>Masuda, N.</creatorcontrib><creatorcontrib>Nemoto, R.</creatorcontrib><creatorcontrib>Suzuki, E.</creatorcontrib><creatorcontrib>Takemoto, T.</creatorcontrib><creatorcontrib>Yuki, F.</creatorcontrib><creatorcontrib>Yagyu, M.</creatorcontrib><creatorcontrib>Toyoda, H.</creatorcontrib><creatorcontrib>Kono, M.</creatorcontrib><creatorcontrib>Kambe, A.</creatorcontrib><creatorcontrib>Umai, S.</creatorcontrib><creatorcontrib>Saito, T.</creatorcontrib><creatorcontrib>Nishimura, S.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fukuda, K.</au><au>Ono, G.</au><au>Watanabe, K.</au><au>Muto, T.</au><au>Yamashita, H.</au><au>Masuda, N.</au><au>Nemoto, R.</au><au>Suzuki, E.</au><au>Takemoto, T.</au><au>Yuki, F.</au><au>Yagyu, M.</au><au>Toyoda, H.</au><au>Kono, M.</au><au>Kambe, A.</au><au>Umai, S.</au><au>Saito, T.</au><au>Nishimura, S.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link</atitle><btitle>2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)</btitle><stitle>CSICS</stitle><date>2011-10</date><risdate>2011</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><issn>1550-8781</issn><eissn>2374-8443</eissn><isbn>9781612847115</isbn><isbn>1612847110</isbn><eisbn>1612847102</eisbn><eisbn>9781612847122</eisbn><eisbn>9781612847108</eisbn><eisbn>1612847129</eisbn><abstract>The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).</abstract><pub>IEEE</pub><doi>10.1109/CSICS.2011.6062438</doi><tpages>4</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1550-8781 |
| ispartof | 2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2011, p.1-4 |
| issn | 1550-8781 2374-8443 |
| language | eng ; jpn |
| recordid | cdi_ieee_primary_6062438 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Clocks Large scale integration Optical receivers Phase locked loops Power demand Voltage-controlled oscillators |
| title | A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T16%3A31%3A26IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20CMOS%20Low-Power%2010:4%20MUX%20and%204:10%20DEMUX%20Gearbox%20IC%20for%20100-Gigabit%20Ethernet%20Link&rft.btitle=2011%20IEEE%20Compound%20Semiconductor%20Integrated%20Circuit%20Symposium%20(CSICS)&rft.au=Fukuda,%20K.&rft.date=2011-10&rft.spage=1&rft.epage=4&rft.pages=1-4&rft.issn=1550-8781&rft.eissn=2374-8443&rft.isbn=9781612847115&rft.isbn_list=1612847110&rft_id=info:doi/10.1109/CSICS.2011.6062438&rft_dat=%3Cieee_6IE%3E6062438%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=1612847102&rft.eisbn_list=9781612847122&rft.eisbn_list=9781612847108&rft.eisbn_list=1612847129&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6062438&rfr_iscdi=true |